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Chapter 2 – SocketModem (MT5600SMI & MT5656SMI)
Multi-Tech Systems, Inc. Universal Socket Hardware Guide for Developers (S000342C) 48
Parallel Host Bus Timing Table
Symbol Parameter Min Max Units
READ (See Notes)
t
AS
Address Setup 5 - ns
t
AH
Address Hold 10 - ns
t
CS
Chip Select Setup 0 - ns
t
CH
Chip Select Hold 10 - ns
t
RD
RD Strobe Width 45 - ns
t
DD
Read Data Delay - 25 ns
t
DRH
Read Data Hold 5 - ns
WRITE (See Notes)
t
AS
Address Setup 5 - ns
t
AH
Address Hold 15 - ns
t
CS
Chip Select Setup 0 - ns
t
CH
Chip Select Hold 10 - ns
t
WT
WT Strobe Width 75 - ns
t
DS
Write Data Setup (see Note 4) - 20 ns
t
DWH
Write Data Hold (see Note 5) 5 - ns
Notes:
1. When the host executes consecutive Rx FIFO reads, a minimum delay of 2 times the internal CPU clock
cycle plus 15 ns (85.86 ns at 28.224 MHz) is required from the falling edge of RD to the falling edge of the
next Host Rx FIFO RD clock.
2. When the host executes consecutive Tx FIFO writes, a minimum delay of 2 times the internal CPU clock
cycle plus 15 ns (85.86 ns at 28.224 MHz) is required from the falling edge of WT to the falling edge of the
next Host Tx FIFO WT clock.
3.
t
RD'
t
WT
= t
CYC
+ 15 ns.
4.
t
DS is measured from the point at which both CS and WT are active.
5.
t
DWH is measured from the point at which either CS and WT become active.
6. Clock Frequency = 28.224 MHz clock.
Parallel Host Bus – Read Parallel Host Bus - Write
- Universal Socket 1
- Connectivity 1
- Table of Contents 3
- Chapter 1 7
- Chapter 1 - Universal Socket 8
- Commands 9
- Universal Pin Descriptions 10
- Design Considerations 13
- Maximum Component Height 16
- SocketModem Developer Board 17
- Telecom Approvals 24
- Label Examples 27
- Industry Canada 28
- South African Statement 29
- Flash Upgrade 30
- Serial Port Upgrade 31
- Ethernet Port Upgrade 32
- Programming the Modem 33
- Other Programming Concerns 34
- Wireless Account Activation 36
- Replacement Parts 39
- Chapter 2 40
- Chapter 2 – SocketModem 41
- (MT5600SMI & MT5656SMI) 41
- Developer Kit 42
- Parallel Configuration 45
- Current Modems 46
- Overview 49
- FCR – FIFO Control Register 52
- LCR – Line Control Register 54
- LSR – Line Status Register 56
- MSR – Modem Status Register 57
- SCR – Scratch Register 58
- Divisor Registers 58
- Microphone and Speaker 60
- Recommended Parts 61
- Chapter 3 62
- Chapter 3 – SocketModem 63
- Timing Requirements 69
- Registers 70
- Time Out Interrupts 72
- FCR – FIFO Control 74
- LCR – Line Control 74
- MCR – Modem Control 74
- LSR – Line Status 75
- MSR – Modem Status 75
- SCR – Scratch 76
- DLL – Divisor Latch (LSByte) 76
- DLM – Divisor Latch (MSByte) 76
- Chapter 4 79
- Chapter 4 – SocketModem 80
- (MT2456SMI-22) 80
- Applications Notes 85
- Chapter 5 87
- Chapter 5 – SocketModem IP 88
- (MT2456SMI-IP) 88
- Chapter 6 95
- (MTXCSEM) 96
- Application Notes 100
- Chapter 7 101
- Chapter 7 – SocketModem ISDN 102
- (MT128SMI) 102
- Technical Specifications 103
- Serial Configuration 104
- Electrical Characteristics 105
- MT128SMI Developer Board 106
- MT128SMI Schematics 107
- Chapter 8 111
- Chapter 8 – SocketModem GPRS 112
- (MTSMC-G) 112
- Mechanical Dimensions 114
- SocketModem Configuration 115
- MMCX Plug 120
- MMCX / SMA Adapter 120
- Antenna Cable 120
- Chapter 9 121
- Chapter 9 – SocketModem CDMA 122
- (MTSMC-C) 122
- CDMA Antenna 127
- Radio Characteristics 127
- Chapter 10 128
- Chapter 10 – SocketWireless 129
- Bluetooth (MTS2BTSMI) 129
- Category Description 131
- Changing Configuration 135
- Antenna Requirements 136
- Antenna 136
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